The disclosed invention relates to logic circuits, and more particularly to logic circuits for performing selectable logic operations. In the prior art, a variety of logic circuits exist for performing single logic operations. These logical operations include a logical AND, OR, NAND, NOR, and FULL ADD. Typically in the past, five separate gates would be required to perform all of these functions. That is, each of the five gates would perform only one function.
Performing separate logic functions by separate gates however, is not a particularly attractive way to meet many logic design requirements. For example, one common requirement is to selectively perform different logical operations on a pair of input signals at different time intervals. In the past, this requirement was met by having one gate connected to receive the input signals for each logical operation that was to be performed. The desired output of these gates was then selectively time multiplexed onto a single output lead by additional AND-OR gates. This solution is not attractive however, because it requires too many gates to implement. On a monolithic integrated circuit, this translates to wasted chip area.
To overcome such problems, there exists in the prior art a multi-function gate as described in the U.S. Pat. No. 3,691,401 which was issued Sept. 12, 1972 to inventors Felimmi and Rogari. This patent discloses a logic circuit which selectively functions as a NAND gate or a NOR gate in response to a command signal. One problem with this circuit however, is that the functions which it selectively performs are too limited. Specifically, this circuit does not operate to perform logical AND, OR, EXCLUSIVE OR, or FULL ADD. In addition, another problem with the patented circuit is that the number of transistors required to perform the two functions is too large. For example, in the disclosed minimum transistor configuration, five transistors are required to perform only a NAND and NOR function.
Therefore, it is one object of the invention to provide an improved multifunction logic circuit.
Another object of the invention is to provide a four transistor logic circuit capable of selectively performing three logical operations.
Another object of the invention is to provide a six transistor logic circuit capable of selectively performing five logical operations.
Still another object of the invention is to provide a six transistor logic circuit suitable for use as an arithmetic logic unit in a digital computer.